Whenever MOSFET transistors are subjected to excessive gate and drain voltages for lengthy periods of time (&gt;100 seconds), damage can result to the transistor due to hot carriers injected into the gate oxide. This damage is usually measured as a threshold voltage or a transconductance shift over time. For MOSFETs subjected to relatively short stress periods between 100 nanoseconds to 1 microsecond, a recoverable parameter shift occurs. This is disclosed in T. Tewksberry, et al., The Effects of Oxide Traps on the Large-Signal Transient Response of Analog MOS Circuits, JSSC, Vol. 24, No. 2, pp. 542-544, Apr. 1989. If, for example, the gate of an N-channel MOSFET is pulsed for 500 ns with a 1.5 volt overdrive, a 200 .mu.V shift in the threshold voltage is exhibited that recovers in approximately 15 .mu.s. The initial shift and recovery time is dependent on the magnitude of the overdrive and the stress time. It is believed that this is due to carriers that are trapped in the oxide interface during the stress period. Once the stress is removed, the trapped charges are redistributed through the channel at a rate proportional to the trap energy.
In successive approximation analog-to-digital converters with relatively high resolution of the order of 16 bits, this trapped charge phenomena has been observed in the comparator input stages thereof. During initial comparison phases, when the Most Significant Bits (MSBs) are tested, the comparator input is stressed due to large input voltages that are present. This stress introduces a data dependent offset error that corrupts later critical comparisons. This has been eliminated in high resolution converters by implementing a flush procedure. This is disclosed in U.S. Pat. No. 5,247,210 entitled "Method and Circuitry for Decreasing the Recovery Time of an MOS Differential Voltage Comparator", which is incorporated herein by reference. After a comparison is made, a field is applied across the gate-to-bulk regions of the comparator input devices by pulling up the well, source and drain terminals thereof to some positive voltage. This field obliterates any data dependent charge left within the oxide.
Another solution to the trapped oxide charge in a comparator input stage was disclosed in K. Tan, et al., Error Correction Techniques for High Performance Differential A/D Converters, JSSC Vol. 25, No. 6, pp. 1318-1327, Dec. 1990. The Tan, et al. reference discloses the use of two comparators, a fine comparator and a rough comparator. During the initial MSB comparison phases when large input voltages may be present, the course comparator is utilized. During the final LSB comparison, the fine comparator is utilized. During these latter comparisons, the comparator input voltages are small and, therefore, the fine comparator would not be stressed. Errors introduced by the course comparator are corrected for by utilizing redundant overlap. In another approach for removing stresses from the input MOSFETs, the comparator input states can be designed in which the input MOSFETs are never stressed. This is disclosed in G. Miller, et al., An 18B lofts Self-Calibrating ADC, 1990, ISSCC Digest of Tech. Papers, pp. 168-169.
The trapped oxide phenomena has also been recognized in operational amplifiers and feedback configurations when utilized in low power delta-sigma modulators. The input stage in the transfer function is comprised of an integrator which slews for approximately 500 ns during the dump period. When the amplifier slews, the input devices are stressed in a data dependent manner. The slew time is dependent upon the amount of input charge that is transferred to the feedback capacitor. The stress introduces a data dependent offset voltage which corrupts the charge transfer process. Since this a non-linear phenomena, the linear converter is affected and harmonic distortion results.